Artesyn ATCA-7480 Installation and Use (February 2015) Handbücher

Bedienungsanleitungen und Benutzerhandbücher für Ausrüstung Artesyn ATCA-7480 Installation and Use (February 2015).
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Inhaltsverzeichnis

ATCA-7480

1

Trademarks

2

Contact Address

2

Contents

10

List of Tables

11

List of Figures

17

About this Manual

19

Abbreviations

20

Conventions

21

Summary of Changes

23

Safety Notes

25

Installation

26

Operation

27

Switch Settings

28

Environment

29

Sicherheitshinweise

31

Schaltereinstellungen

34

Batterie

35

Umweltschutz

35

Introduction

37

1.2 Mechanical Data

38

1.3 Product Identification

39

1.4 Ordering Information

39

Chapter 2

43

Temperature Spot 1

46

PIM

46

2.2.2 Power Requirements

47

2.3 Blade Layout

50

2.4 Switch Settings

51

2.5.1 DIMM Memory Modules

53

2.6.1 Installing the Blade

59

Installation Procedure

60

2.6.2 Removing the Blade

62

Chapter 3

65

3.1 Faceplate

65

3.1.1 LEDs

66

3.1.2 Keys

67

3.1.3 Connectors

67

3.1.3.1 Serial COM#1 P17

68

3.1.3.2 Ethernet Connector

68

3.2 On-board Connectors

70

 SAS update channel

76

 100Base-BX update channel

76

SAS Update channels

79

CLK100_RTM CPU1PORT3AB DP

80

CLK100_RTM CPU1PORT3AB DN

80

CLK100_RTM CPU1PORT3CD DP

80

CLK100 RTM CPU1PORT3CD DN

80

Functional Description

83

4.3 DDR4 Main Memory

84

Wellsburg

85

4.5 ATCA Fabric IF Ethernet

86

4.6 Storage Controller

87

(SSD) Carrier/Riser Card

87

4.8 Heat Sink

87

4.9 BIOS

87

4.10 IPMC

88

4.10.2 FRU Data serial IDROM

90

4.11 Serial Redirection

91

4.12 Serial Over LAN

91

4.13 Control Logic

92

4.14 Front Board Faceplate

92

4.15.1 IPMC Debug Console

93

4.16 USB 3.0 Interfaces

94

4.17 LPC Interface

94

4.18 Trusted Platform Module

94

4.19 Real Time Clock

95

4.20 SMBus

95

5.1.1 Register Decoding

100

5.1.2 POST Code Register

101

Maps and Registers

102

5.1.3.3 Configuration Mode

103

5.1.4.2 UART Registers DLAB=0

110

5.1.5 FPGA Register Mapping

125

5.1.7 Version Register

129

5.1.12 Reset Registers

140

5.1.12.2 Reset Mask Register

141

5.1.13 CPU Control Register

148

5.1.28 BIOS Version Registers

170

5.1.30 Scratch Registers

171

Chapter 6

173

6.1 Introduction

173

Redirection

174

6.2.3 Connecting to the Blade

175

6.4 Boot Options

177

By Setup

178

6.4.3 By Boot Menu

179

6.5 IPMI Boot Parameter

180

6.6 BIOS Setup Configuration

181

6.6.1 Main

182

6.6.2 Advanced

182

RTM Configuration

184

Figure 6-6 RTM Configuration

184

Peripheral Configuration

186

SATA Configuration

188

Figure 6-9 SATA Configuration

188

USB Configuration

189

Figure 6-10 USB Configuration

189

CPU Configuration

191

Figure 6-11 CPU Configuration

191

Memory Configuration

195

RAS configuration

196

Console Redirection

197

APEI Configuration

198

IPMI Configuration

200

6.6.3 Security

202

6.6.4 Boot

203

Table 6-16 Boot (continued)

204

6.6.5 Exit

207

6.7 UEFI Secure Boot

208

6.9 IPMI Support

209

6.10 Watchdog Support

209

6.11 BIOS Error Logging

210

6.11.2 IPMI Error Logging

212

6.12 LED Usage

214

6.13 Upgrading the BIOS

214

6.14 BIOS POST Codes

214

Switch 4-3 and 4-4 to ON

215

Table 6-20 BIOS POST Codes

215

Serial Over LAN

223

7.3.2 Using ipmitool

225

Supported IPMI Commands

229

8.1.3 Watchdog Commands

230

8.1.4 SEL Device Commands

231

8.1.5 FRU Inventory Commands

231

8.1.6 Sensor Device Commands

232

8.1.7 Chassis Device Commands

233

8.2 PICMG 3.0 Commands

250

Commands

252

8.4.1 Get Status Command

260

8.4.4 Get Debug Level Command

265

8.4.5 Set Debug Level Command

266

8.4.14 Reset IPMC Command

272

8.4.15 Hang IPMC Command

272

8.4.16 Graceful Reset Command

273

IPMI Feature Set

279

9.1 Firmware Architecture

282

9.2 Firmware Upgrade

283

9.2.1.2 IAP Component

285

9.2.1.3 FPGA Component

285

9.2.1.4 BIOS Component

286

9.2.3 Firmware Upgrade Tool

288

9.2.3.2 Updating ipmitool

289

9.2.3.3 Upgrading Interfaces

289

9.3 Sensors

292

9.3.1 Payload Driven Sensors

304

9.3.4 Power Good Sensor

305

9.3.5 Power Interface Sensors

305

9.3.6 Reset Cause Sensor

306

9.3.8 ME Power Failure Sensor

307

9.4 POST

308

9.6 FRU Inventory

309

9.5 Ejector Handle De-Bounce

309

9.7 Reset and Power Domain

312

9.8 Power Configuration

312

9.11 Serial Line Selection

314

9.12 BIOS Boot Bank Selection

315

9.12.2 Fail Safe Logic

316

Missing or defect boot block

317

Figure 9-3 FailSafe

317

9.13.1 Boot Bank Sensor

319

9.13.2 Fail Protect Logic

319

Figure 9-4 Fail Protect

320

Replacing the Battery

323

Related Documentation

327

B.2 Manufacturers’ Documents

328

B.3 Related Specifications

328





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